The AutobusGW 30 is an FPGA-based high-density Automotive Bus Ethernet Gateway capable of providing access for up to 30 Automotive Bus ports in a 1U compact and modular design. It is shown above in the variant offering 24 CAN/CANFD and 6 SENT ports.
Under the hood is a Xilinx Ultrascale+ Zynq SoC featuring an FPGA with Quad Core ARM Cortex-A53 processors. The tight integration of ARM processors and FPGA allows high port density without compromising performance.
The AutobusGW is a modular platform. Every group of 6 front-panel interfaces are internally controlled by an IO-Module daughterboard implementing support for a particular Automotive Bus standard. It is therefore possible to configure the AutobusGW according to the customer’s needs. The following are sample configurations:
Please contact us for custom configurations.
The CAN ports offer galvanic isolation with one floating ground per port. The 120 Ohm Termination resistor is also dynamically switchable (using a true analog switch) via the software API.
The configuration interface of the AutobusGW is a simple-to-use REST API. With regards to payload, a TCP socket is used per configured virtual CAN bus. Please refer to the User Guide for more information.
Using the second gigabit Ethernet port (e1), it is possible to let virtual CAN buses extend over multiple AutobusGW units. The CAN packets are broadcast on the second network interface, which allows all AutobusGW units to listen and process the packets. Using this option, it is possible to dynamically redefine many virtual CAN buses which extend over multiple physical AutobusGW units without any recabling.
The AutobusGW is currently available with configurations including CAN/CANFD, SENT and LIN 2.2 .
The following new interfaces are planned: